The 4th IEICE International Conference on Integrated Circuits Design and Verification (ICDV 2013)

11/15/2013 13:46


The 4th International Conference on Integrated Circuits, Design, and Verification (ICDV 2013) November 15-16, 2013 – Ho Chi Minh City, Vietnam

Sponsored by IEICE Vietnam Section, IEICE Electronics Society Technical Committee on Integrated Circuits and Devices, and IEICE Engineering Science Society Technical Committee on VLSI Design Technologies; Co-sponsored by IEICE Electronics Society Technical Committee on Microwave Engineering, IEEE SSCS Japan Chapter, IEEE SSCS Kansai Chapter, and The Radio-Electronics Association of Vietnam (REV)

The former ICDV (Integrated Circuits and Devices in Vietnam) was an annual international forum for presenting chips and circuit designs in solid-state and semiconductor fields. This ICDV is renewal one as Integrated Circuits, Design, and Verification. Continuous scaling of the CMOS devices increases the number of transistors on a VLSI chip. It will soon reach the level of 10 giga transistors on a single chip, which is equivalent to the total neuron numbers in the human brain. This would certainly provide us a great opportunity for new applications and information processing. On the other hands, the small feature size causes new problems such as leakage current and process variation. To discuss utilizing the scaling advantages and coping with the new problems, we call for contributions about new proposal of application systems, VLSI architectures, and design methodologies as well as the technologies in the integrated circuit and device field. We expect to this conference explores and stimulates the contributed researches to those subjects. The papers are solicited from prospective authors interested in the related fields. The ICDV 2013 conference is supported by the IEICE Vietnam section (established in Jan. 2013), the IEICE ICD technical group and the IEICE VLD technical group, and will be held in Ho Chi Minh City, Vietnam. Further details on the workshop, paper submission guidelines, and templates will be updated on the ICDV website. Paper Submission Prospective authors are invited to submit full-length, six-page manuscripts, including figures, tables and references, to the official ICDV 2013 website. All papers will be handled electronically. Accepted and presented papers will be included in the conference proceedings published by the IEICE and will be invited to submit to REV Journal on Electronics and Communications (JEC). Papers are solicited in the following categories, but are not limited to:

  • 1. Digital integrated circuits and signal processing
  • 2. Processors/ multiprocessors
  • 3. Memory
  • 4. Analog and mixed-signal circuits
  • 5. RF integrated circuits and microwave engineering
  • 6. Circuit technologies
  • 7. Design experience with advanced design technology
  • 8. Circuits/devices modeling, verification and testing
  • 9. Reconfigurable architectures
  • 10. FPGA-based designs
  • 11. Embedded systems design
  • 12. Applications related to integrated circuits and devices

Important dates:

  • - Manuscript submission: July 15, 2013
  • - Notification of acceptance: Sep. 15, 2013
  • - Camera-ready submission: Sep. 30, 2013